WARP FPGA Cores
The cores listed below are provided to facilitate use of the various hardware resources on the WARP hardware.
Mango WARP v3 and Module Cores
- w3_iic_eeprom: IIC master for reading/writing EEPROM
- w3_userio: Controller for all user I/O resources (LEDs, buttons, etc.)
- w3_ad_controller: Controller for managing RF interface analog converters
- w3_ad_bridge: Connects user logic to digital ports on AD9963
- w3_clock_controller: Controller for managing RF interface clock buffers
- radio_controller: Controller for managing RF interface transceivers and front-ends
- fmc_bb_4da_bridge: Interface for FMC-BB-4DA module
WARP v2 Cores
- warp_v4_userio: Controller for all user I/O resources (LEDs, buttons, etc.)
WARP v1 & v2 Cores
- radio_controller: Controller for managing RF interface transceivers and front-ends
- radio_bridge: Connects radio_controller to top-level ports for one Radio Board
- eeprom_onewire: OneWire master for reading/writing FPGA Board and Radio Board EEPROMs
- clock_board_config: Configures Clock Board buffers on power up
Reference Design APIs
For details about the APIs integrated in our various reference designs please refer to the individual design user guides:
Last modified 11 years ago
Last modified on Mar 3, 2014, 7:00:59 PM