| Version 2 (modified by murphpo, 17 years ago) (diff) |
|---|
WARP FPGA Board I/O
10/100 Ethernet
Intel LXT972A physical layer Ethernet transceiver
Three status LEDs. LEDs only work after the PHY is initialized by a MAC in the FPGA.
| Label | Color | Component | Function |
| Activity | Green | D3 | Blinks with network activity |
| Speed | Amber | D6 | Glows for 100Mbit links |
| Link | Green | D7 | Glows with valid PHY link |
RS-232 UART
FPGA board configured just like a PC- male DB9 connector, Tx on 3, Rx on 2, GND on 5. Null-modem (crossover) female-female cable required to connect to PC's serial port.
Digital I/O
16-bits of unbuffered 3.3v I/O connected directly to FPGA I/O pins. 4 ground pins at each corner of 20-pin 0.1" header.
