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WARP Hardware

Topic Replies Views Last post
convertor clock source by Julian
4 1549 2011-Aug-17 10:07:03 by murphpo
Problem in MIMO with Radio Card by witestlab
3 1309 2011-Jul-20 09:46:02 by murphpo
FPGA configuration circuit by Julian
2 996 2011-Jul-17 21:39:48 by Julian
Interoperability between MIMO KIT v1 and MIMO KIT v2 by iris
1 1047 2011-Jul-15 02:21:14 by murphpo
Biginner by irtaza_hassan
3 1076 2011-Jul-13 10:07:17 by irtaza_hassan
External clock source? by riveridea
3 1082 2011-Jul-07 20:09:18 by murphpo
Connect two radio boards by degarter
3 1528 2011-Jul-05 12:55:33 by murphpo
about radio controller by Julian
1 867 2011-Jun-24 12:48:55 by murphpo
about configuration port by Julian
1 735 2011-Jun-16 10:56:57 by murphpo
Measuring the execution time of a C code by Ahmad Amr
3 1715 2011-May-24 12:02:17 by murphpo
MGT Cable Link invalid by zrcao
5 3449 2011-May-18 15:08:50 by Jettank
Analog Board by degarter
1 811 2011-May-18 08:44:36 by murphpo
high performance clock sources and the WARP v2 by vladb38
1 831 2011-May-16 22:10:19 by murphpo
fast transfers between a user pcore and the 2GB memory (Virtex 4) by vladb38
2 1610 2011-Apr-21 11:38:29 by riveridea
MCH interface to external SDRAM by zrcao
1 931 2011-Mar-31 20:00:16 by murphpo
Collection of raw data from the receiver into a text file by Abhinandan
3 10162 2011-Mar-23 21:34:35 by murphpo
The GPS and Linux SOC on the back of WARP board? by riveridea
1 1332 2011-Mar-09 03:32:36 by murphpo
The mechanism to change the freq of radio board thru radio controller by riveridea
6 2265 2011-Mar-02 19:36:04 by riveridea
How to generate the IP Core for radio_controller? by riveridea
1 885 2011-Feb-25 18:40:23 by murphpo
Debug IO J16 pins by dineshb
1 899 2011-Feb-07 21:20:13 by murphpo
usb configuration by hanady
1 1107 2010-Dec-17 11:32:36 by murphpo
Time constraints not meet when generating bitstream for WARPLab by riveridea
1 1904 2010-Dec-02 18:03:43 by murphpo
MGT protectors in OFDM v15 overheating U1 1.2V voltage regulator by rmoraw
3 2248 2010-Nov-19 18:03:11 by rmoraw
Using BSB to build project with SDRAM, but self-testing not passed by mygnon
0 806 2010-Nov-19 01:51:06 by mygnon
what is the function of the Analog board? by Alicia
2 1111 2010-Nov-04 23:19:21 by Alicia
USB driver is not Xilinx FPGA Platform firmware loader & iMPACT failur by riveridea
3 2242 2010-Oct-26 14:21:05 by murphpo
No Board Name as Warp Kits can be selected in Base System Builder by riveridea
1 945 2010-Oct-25 22:11:42 by riveridea
About the Processor clock frequency and Bus clock frequency by sqmk2
4 1782 2010-Sep-29 02:05:57 by sqmk2
DebugIO Pins by Christian
3 1540 2010-Aug-12 12:33:21 by Christian
Buffer overflow detection by heming_mcgill
2 1276 2010-Jul-20 11:05:29 by heming_mcgill

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